ASU Engineering Launches Innovative Semiconductor Packaging Badge Program

The Ira A. Fulton Schools of Engineering at Arizona State University (ASU) is excited to announce the launch of a cutting-edge Semiconductor Packaging, Assembly, and Test badge program. This innovative initiative aims to equip professionals with the essential skills and knowledge demanded by today's rapidly evolving semiconductor industry.

 

ITSI Funding and Program Connection

This badge program is part of the International Technology Security and Innovation (ITSI) Workforce Accelerator, supported by the ITSI Fund established under the U.S. CHIPS and Science Act of 2022. The U.S. Department of State's Bureau of Economic and Business Affairs has allocated $500 million over five years to promote secure telecommunications networks and ensure semiconductor supply chain security and diversification.

ASU, in partnership with the U.S. Department of State, is implementing a program aimed at diversifying the global semiconductor supply chain. This initiative is designed to expand semiconductor chip assembly, testing, and packaging operations in key partner countries across the Americas (Mexico, Costa Rica, and Panama) and the Indo-Pacific (Indonesia, Philippines, and Vietnam). In recognition of ASU's expertise in this area, the U.S. Department of State's Bureau of Economic and Business Affairs awarded a two-year, $13.8 million cooperative agreement to ASU in February 2024 under the ITSI fund. This award underscores ASU's critical role in supporting efforts to strengthen and diversify global semiconductor operations.

Program Overview:

The badge program consists of four micro-badges, each focusing on a key aspect of semiconductor packaging:

1. 2D Packaging & Assembly: Understanding in-demand 2D packaging techniques
2. Materials Selection for Thermo-Mechanical & Electrical Performance: Learning to optimize device performance
3. Application of Electrical & Thermo-Mechanical Modeling: Developing crucial modeling skills for next-gen designs
4. Materials Selection for Thermo-Mechanical & Electrical Performance: Gaining quality testing expertise valued by employers

Each micro-badge involves 10 hours of intensive learning, structured into three sessions scheduled from 5:30 pm to 9 pm. This format allows participants to balance their professional commitments with this specialized training.

Program Schedule

The program will run from Oct. 7–31, 2024, with classes held on specific dates. This level 2 badge is designed for forward-thinking professionals ready to embrace the future of semiconductor manufacturing.

Expert Instruction:

The program will be co-taught by four of ASU's leading semiconductor experts, each bringing extensive industry experience to the classroom:

• Terry Alford, Associate Professor at the School for Engineering of Matter, Transport and Energy
• Christopher Bailey, Professor at School of Electrical, Computer and Energy Engineering
• David Theodore, Faculty Associate at the School for Engineering of Matter, Transport and Energy
• Hongbin Yu, Professor at School of Electrical, Computer and Energy Engineering

Program Benefits:

Participants will gain a deeper insight into semiconductor packaging, from design principles to testing and reliability considerations. The program covers various topics, including electrical concepts, thermal management, mechanical properties, packaging materials, manufacturing processes, and testing methodologies.

As one of the world's top-ranked engineering schools, the Ira A. Fulton Schools of Engineering offers this badge as an opportunity for professionals to enhance their employability and position themselves for success in the ever-evolving electronics industry.

For more information and to enroll, visit: careercatalyst.asu.edu/programs/semiconductor-packaging-assembly-test/ 

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Authored by Niki Li